DAG
QuICT.qcda.optimization.clifford_rz_optimization.DAG ¶
Bases: Iterable
DAG representation of a quantum circuit that indicates the commutative relations between gates. Iterate over a DAG will gate a sequence of BasicGate's in topological order.
Parameters:
-
gates(Circuit) –Circuit represented by this DAG
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
Node ¶
DAG node class.
Parameters:
-
gate_(BasicGate, default:None) –Gate represented by this node
-
qubit_(int, default:0) –the actual qubit the gate sits on (used only when
gate_is None)
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
add_forward_edge ¶
Add an edge from self to node. Make sure qubit_id is up to date.
Parameters:
-
qubit_(int) –the actual qubit this edge sit on
-
node(Node) –the node this edge point to
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
append ¶
Insert a (node, backward_qubit) after (self, forward_qubit)
Parameters:
-
forward_qubit(int) –the wire this edge points from
-
backward_qubit(int) –the wire this edge points to
-
node(Node) –the node this edge points to
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
connect ¶
Connect (self, forward_qubit) to (node, backward_qubit)
Parameters:
-
forward_qubit(int) –the wire this edge points from
-
backward_qubit(int) –the wire this edge points to
-
node(Node) –the node this edge points to
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
erase ¶
erase this node from the DAG. It will: 1. set this node as FLAG_ERASED 2. remove pointers between it and adjacent nodes
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
get_gate ¶
Get a copy of corresponding gate of the node
Returns:
-
BasicGate(BasicGate) –corresponding gate
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
VirtualNode ¶
Bases: Node
Virtual DAG node. When we want to temporarily insert a node into a DAG but not actually change the DAG structure, we can create a virtual node.
Parameters:
-
gate_(BasicGate) –the gate
-
predecessors(List[Tuple[Node, int]]) –predecessors of this node
-
successors(List[Tuple[Node, int]]) –successors of this node
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
__iter__ ¶
Iterate over gates in this DAG in topological order
Returns:
-
Iterator[BasicGate]–Iterator[BasicGate]: gates in topological order
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
append ¶
Add a gate after this DAG.
Parameters:
-
gate_(BasicGate) –gate to add
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
compare_circuit ¶
compare_circuit(other: Tuple[Node, int], anchor_qubit: int, flag_enabled: bool = False, dummy_rz: bool = False) -> Dict
Compare this circuit with another circuit.
This circuit starts from the first gate on the anchor_qubit.
The other starts from (gate, wire) defined by variable other.
Param values (such as phases in Rz) ignored.
Parameters:
-
other(Tuple[Node, int]) –start point of the other circuit
-
anchor_qubit(int) –start point of this circuit.
-
flag_enabled(bool, default:False) –Whether consider
flagfield. If true, nodes already with FLAG_VISITED will be skipped. Nodes in the matching will be set FLAG_VISITED. -
dummy_rz(bool, default:False) –Enable dummy_rz feature: when there is a rz is
selfbut not inother, create a virtual Rz(0) inotherto match them.
Returns:
-
Dict–Dict[int, DAG.Node]: mapping from id(node of this circuit) to matched node in the other circuit. If not matched, return None.
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
destroy ¶
Destroy this DAG.
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
get_circuit ¶
Generate circuit net list from this DAG.
Parameters:
-
keep_phase(bool, default:True) –whether to keep the global phase as a GPhase gate in the output
Returns:
-
Circuit(Circuit) –Circuit equivalent to this DAG
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
get_reachable_relation ¶
Get reachable relation of nodes, namely whether (node A, wire) can reach the other node B.
Returns:
-
Set[Tuple[Tuple[int, int], int]]–Set[Tuple[Tuple[int, int], int]]: Reachable relation ((id(A), wire), id(B))
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
get_reachable_set
staticmethod
¶
Get a set of reachable nodes starting from (node, qubit_)
Parameters:
-
node(Node) –starting node
-
qubit_(int) –starting wire
-
succ_node(List[Tuple[Node, int]], default:None) –right boundary
Returns:
-
Set[int]–Set[int]: id of reachable nodes
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
get_sub_circuit_reachable_relation
classmethod
¶
Get reachable relation of nodes in the sub circuit, namely whether (node A, wire) can reach node B.
If prev_node[i] and succ_node[i] is None, the sub circuit does not contain qubit i.
Parameters:
-
prev_node(List[Tuple[Node, int]]) –left bound of the sub circuit.
-
succ_node(List[Tuple[Node, int]]) –right bound of the sub circuit.
Returns:
-
Set[Tuple[Tuple[int, int], int]]–Set[Tuple[Tuple[int, int], int]]: Reachable relation ((id(A), wire), id(B))
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
replace_circuit
staticmethod
¶
Replace a part of this DAG with replacement defined by mapping.
Parameters:
-
mapping(Dict[int, Tuple[Node, int]]) –mapping from the replacement to this circuit
-
replacement(DAG) –new sub circuit
-
erase_old(bool, default:True) –whether erase old circuit
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
reset_flag ¶
Set flag of all nodes to FLAG_DEFAULT
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
set_qubit_loc ¶
Update qubit_loc of all nodes.
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
topological_sort ¶
Iterate over nodes in this DAG in topological order (ignore start nodes)
Returns:
-
Iterator–Iterator[DAG.Node]: nodes in topological order
Source code in QuICT/qcda/optimization/clifford_rz_optimization/dag.py
topological_sort_sub_circuit
staticmethod
¶
Sort the sub circuit between prev_node and succ_node in topological order.
Returns:
-
Iterator–Iterator[DAG.Node]: nodes in topological order